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Pull requests: diffblue/hw-cbmc

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Pull requests list

AIGER output: emit module outputs and input names
#2043 opened Jul 22, 2026 by tautschnig Collaborator Loading…
4
Verilog: synthesize the module instance hierarchy monolithically Verilog
#2040 opened Jul 21, 2026 by kroening Collaborator Loading…
5 tasks done
1
Verilog: typed assignment patterns Verilog
#2038 opened Jul 21, 2026 by kroening Collaborator Loading…
1
SMV word-level: support reduction and replication operators
#2037 opened Jul 21, 2026 by kroening Collaborator Loading…
1
Fix unsound fairness handling in liveness-to-safety translation engines
#2022 opened Jul 17, 2026 by kroening Collaborator • Draft
1
new IC3: recycle frame solvers after 2000 queries engines
#2020 opened Jul 16, 2026 by kroening Collaborator Loading…
2 tasks done
1
new IC3: improved obligation priority and activity decay engines
#2019 opened Jul 16, 2026 by kroening Collaborator Loading…
2 tasks done
3
new IC3: eager clause pushing in blocking and propagation engines
#2018 opened Jul 16, 2026 by kroening Collaborator Loading…
2 tasks done
1
new IC3: parent-lemma optimization and MIC_FAIL_MAX increase engines
#2017 opened Jul 16, 2026 by kroening Collaborator Loading…
2 tasks done
new IC3: polarity hinting for frame solvers engines
#2016 opened Jul 16, 2026 by kroening Collaborator Loading…
2 tasks done
new IC3: enable CTG with budget and EXCTG engines
#2015 opened Jul 16, 2026 by kroening Collaborator Loading…
2 tasks done
new IC3: restrict SAT solver decisions to latch and input variables engines
#2014 opened Jul 16, 2026 by kroening Collaborator Loading…
2 tasks done
new IC3: handle netlist invariant constraints engines
#2013 opened Jul 16, 2026 by kroening Collaborator Loading…
2 tasks done
1
hw-cbmc: make register_languages a proper override
#2010 opened Jul 16, 2026 by kroening Collaborator Loading…
3
hw-cbmc: re-enable --vcd
#2008 opened Jul 16, 2026 by kroening Collaborator • Draft
BDD: ignore finite deadend branches in AG engines
#2004 opened Jul 13, 2026 by kroening Collaborator • Draft
Temporal logic: restrict LTL_to_CTL to common fragment engines
#2003 opened Jul 13, 2026 by kroening Collaborator Loading…
4
New IC3: fix spurious refutations under invariant constraints engines
#1994 opened Jul 12, 2026 by kroening Collaborator Loading…
1
New IC3: decision-variable restriction and eager clause pushing engines
#1993 opened Jul 12, 2026 by kroening Collaborator Loading…
1
Verilog: extract elaboration-time simulator into a class
#1988 opened Jul 9, 2026 by kroening Collaborator • Draft
IC3: rename new-ic3 to ic3, old ic3 to old-ic3 engines
#1986 opened Jul 8, 2026 by kroening Collaborator • Draft
4 tasks done
Verilog: modport port expressions Verilog
#1985 opened Jul 8, 2026 by kroening Collaborator • Draft
4 tasks done
Verilog: parameterized interface port connections Verilog
#1984 opened Jul 8, 2026 by kroening Collaborator • Draft
3 tasks done
Verilog: modport import and export declarations Verilog
#1982 opened Jul 8, 2026 by kroening Collaborator • Draft
5 tasks done
Verilog: extern method prototypes in interfaces Verilog
#1981 opened Jul 8, 2026 by kroening Collaborator • Draft
4 tasks done
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