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riscv: add raw bit access to generated CSR modules - #415

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JurajSadel:upstream/csr-raw-bits-typed
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riscv: add raw bit access to generated CSR modules#415
JurajSadel wants to merge 1 commit into
rust-embedded:masterfrom
JurajSadel:upstream/csr-raw-bits-typed

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@JurajSadel
JurajSadel requested a review from a team as a code owner August 7, 2026 12:38
Comment on lines +56 to +64
#[allow(unused)]
pub fn _read_csr_bits() -> usize {
read_bits()
}

#[allow(unused)]
pub fn _try_read_csr_bits() -> Result<usize> {
try_read_bits()
}

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Why did you include these?

Comment on lines +66 to +84
#[allow(unused)]
pub fn _read_csr_bits() -> usize {
read_bits()
}

#[allow(unused)]
pub fn _try_read_csr_bits() -> Result<usize> {
try_read_bits()
}

#[allow(unused)]
pub fn _write_csr_bits(bits: usize) {
unsafe { write_bits(bits) };
}

#[allow(unused)]
pub fn _try_write_csr_bits(bits: usize) -> Result<()> {
unsafe { try_write_bits(bits) }
}

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Why did you include these?

Comment on lines +56 to +64
#[allow(unused)]
pub fn _write_csr_bits(bits: usize) {
unsafe { write_bits(bits) };
}

#[allow(unused)]
pub fn _try_write_csr_bits(bits: usize) -> Result<()> {
unsafe { try_write_bits(bits) }
}

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Why did you include these?

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2 participants